2.2 Design a synchronous 3-bit counter that counts OD(D)/(E)VEN numbers. Use a switch to
change the counting mode. After suppling the circuit, if the switch is OFF at any time, the
counter should run in following pattern "... 0->2->4->6->0->2->4->6dots..." When the
switch is ON at any time, the counter should change the counting mode as "... 1->3->5->
7->1->3->5->7dots'. Use 74LS111 JK Flip-Flop IC and only NAND Gates for this simulation.
Show your design steps (state transition diagram, state table and K-Maps) clearly. (Hint: If
the Run Time Error is taken place at the beginning of simulation, turn Master SET and Master
RESET of ICs OFF and restart simulation. Then turn these states back ON.)
Figure 2: 3-Bit OD(D)/(E)VEN Counter with 74LS111 JKFF