5.9 Cache block size (B) can affect both miss rate and miss latency. Assuming a machine with a base CPI of 1 , and an average of ( 1.35 ) references (both instruction and data) per instruction, find the block size that minimizes the total miss latency given the following miss rates for various block sizes. 5.9.1 ( [10] ) What is the optimal b solutionspile.com

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5.9 Cache block size (B) can affect both miss rate and miss latency. Assuming a machine with a base CPI of 1 , and an average of  ( 1.35  ) references (both instruction and data) per instruction, find the block size that minimizes the total miss latency given the following miss rates for various block sizes. 5.9.1  ( [10]  ) What is the optimal block size for a miss latency of  ( 20  times B  ) cycles? 5.9.2  ( [10]  ) What is the optimal block size for a miss latency of  ( 24+B  ) cycles? 5.9.3  ( [10]  ) For constant miss latency, what is the optimal block size? solutionspile.com

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