(Solved): (a) Draw a state diagram for the subunit which produces the following timing diagram shown in Figu ...

(a) Draw a state diagram for the subunit which produces the following timing diagram shown in Figure \( 1 . \) (b) Construct the subunit which produces the following timing diagram shown in Figure 1 by using digital logic gates. Figure 1: Timing Diagram (I: Input, 0: Output)