(Solved): Consider repeating load ("lw") data from the following addresses using ile Preview sser with 32 bit ...

Consider repeating load ("lw") data from the following addresses using ile Preview sser with 32 bits address. ile Preview J1 0024] Mem[0x1001 0044] If the loading was repeated for many $(>1$ million) times, what are the Miss rates of using direct mapped with 8 sets, block size $=1$ word; 2way set associative cache with 4 sets, block size $=1$ word? Please provide details of analysis, simply filling the table gets 0 point.