(Solved): The schematic diagram shown in Figure 6 shows a ternary full adder that receives two ternary digits ...

The schematic diagram shown in Figure 6 shows a ternary full adder that receives two ternary digits $\mathrm{X}$ and $\mathrm{Y}$ plus a carry-in ${\mathrm{C}}_{\mathrm{i}}$ and produces the sum $S$ in base 3 plus a carry-out $C_0$. The ternary digits are coded by two binary digits: 0 by 00,1 by 01 , and 2 by 10 . Thus, for example, if $\mathrm{X}$ and $\mathrm{Y}$ are each equal to 2 in base 3 and ${\mathrm{C}}_1$ equals 1 , the ternary full adder is required to perform the ternary addition of $(2{)}_3+(2{)}_3+(1{)}_3=(12{)}_3$. Accordingly, the sum $\mathrm{S}$ must be 2 while the carry-out must be 1 . Design the circuit assuming you have as many gates as necessary as well as binary half and full adders.