(Solved): When the MIPS architecture was in the early design stages some years ago, one of the designers obser ...

When the MIPS architecture was in the early design stages some years ago, one of the designers observed that the operation y = a+2*b appeared often in his C programs. He suggested that an R-type instruction addck be added to the MIPS instruction set. The format of this instruction is addck rd, rs, rt and its operation is rd = rs + 2 * rt so that when the processor executes this instruction, it multiplies the value in register rt by 2 and then adds it to the value in register rs and stores the result in register rd. The multiplication is done by shifting the bits by one to the left and placing a 0 at the empty rightmost bit. Start with the figure of the non-pipelined (single-cycle) processor and add the necessary hardware and signals to execute the instruction addck. Describe any new, updated or deleted signal lines and control signals. CLEARLY place your updates directly on the figure below and describe your changes. Show the values of all (new and modified) control signals. Make sure you do not change the earlier functionality of the processor (the processor should still be able to correctly execute the instructions we studied in class). This instruction was not included in the final MIPS instruction set. Why?

PC Instruction [25-01 26 Instruction [31-26] Instruction [25-21] Instruction [20-16] Instruction (15-11) Instruction [15-01 Add Read address Instruction [31-0] Instruction memory Shift left 2/ Jump address [31-0] 28 PC +4 [31-28 RegDst Jump Branch MemRead MemtoReg ALUOP MemWrite ALUS.C RegWrite Control Read register 1 Read data 1 Read register 2 Write Read register data 2 Write data Registers 16 32 Sign- extend Instruction [5-01 Shift left 2/ ALU >Add result Zero ALU ALU result ALU control/ ( 3x Max Address data Read Write Data data memory