Write a dataflow Verilog description for the circuit shown below by using the Boolean equation for the output F. Using ModelSim run the circuit Testbench for all 8 possible input combinations (for \( X, Y \), and \( Z \) ) (Hint: use 'Assign' statement(s) with Verilog Operators shown in the table below.) Submit the HDL code and waveforms for full credit. Bitwise Verilog Operators